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Main characteristics
FPGA: Kintex XC7K325T-2FFG900C
ROHS-compliant KC705 suite, including XC7K325T-2FFG900C FPGA
To configure
JTAG Configuration Circuit on Board is Configured by USB
JTAG header is used with Xilinx download cable, such as platform cable USB II
128MB (1024Mb) Linear BPI FLASH providing PCIe configuration
16MB (128Mb) Quadruple SPI Flash Memory
storage
1GB DDR3 SODIMM 800MHz/1600Mbps
128MB (1024Mb) Linear BPI FLASH providing PCIe configuration
16MB (128Mb) Quadruple SPI Flash Memory
8Kb IIC EEPROM
SD card slot
Communication and Network
Gigabit Ethernet GMII, RGMII and SGMII
SFP/SFP+Shielding Cover
GTX ports with four SMA connectors (TX and RX)
UART to USB Bridger
PCI Express X8 Edge Connector
display
HDMI Video Output
External Phy/codec Devices Driving HDMI Connectors
2×16 LCD Display
8x LED
expansion connector
FMC-HPC (partially filled) connector (4 GTX transceivers, 116 single-ended or 58 differential (34 LA and 24 HA) user-defined signals)
FMC-LPC connector (1 GTX transceiver, 68 single-ended or 34 differential user-defined signals)
Vadj supports 1.8V, 2.5V (default) or 3.3V
IIC
Clock technology
Fixed oscillator with differential 200 MHz output
Used as “System” Clock of FPGA
Programmable oscillator with default output of 156.250 MHz
Oscillator is the default frequency for Ethernet applications, but programmable for many end users
Differential SMA clock input
Differential SMA GTX Reference Clock Input
Jitter attenuation clock
To support CPRI/OBSAI applications, perform Clock Repair from a user-provided SFP/SFP+module
Control and amp;amp; I/O
5 buttons
Four DIP Switches
Diff Pair I/O (1 SMA pair)
AMS FAN Header (2 I/O)
Seven I/O pins obtained by LCD header
Power
12V plug-in adapter or ATX
Voltage and current measurement function of 2.5V, 1.5V, 1.2V and 1.0V power supply (IIC path of FPGA)
simulation
XADC head